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| author | Suren A. Chilingaryan <csa@dside.dyndns.org> | 2011-07-17 18:26:46 +0200 |
|---|---|---|
| committer | Suren A. Chilingaryan <csa@dside.dyndns.org> | 2011-07-17 18:26:46 +0200 |
| commit | 8ad813673ae155ce0e601ae864466a59ce7afa95 (patch) | |
| tree | a7289e7179fed4ac939430de259cbaf1df7a71dc /dma/nwl_engine.c | |
| parent | 21d12d6157061bca3926607a248ccc16d6b07bd1 (diff) | |
| download | ipecamera-8ad813673ae155ce0e601ae864466a59ce7afa95.tar.gz ipecamera-8ad813673ae155ce0e601ae864466a59ce7afa95.tar.bz2 ipecamera-8ad813673ae155ce0e601ae864466a59ce7afa95.tar.xz ipecamera-8ad813673ae155ce0e601ae864466a59ce7afa95.zip | |
Few more fixes
Diffstat (limited to 'dma/nwl_engine.c')
| -rw-r--r-- | dma/nwl_engine.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/dma/nwl_engine.c b/dma/nwl_engine.c index 6987045..669dbbd 100644 --- a/dma/nwl_engine.c +++ b/dma/nwl_engine.c @@ -65,6 +65,7 @@ int dma_nwl_start_engine(nwl_dma_t *ctx, pcilib_dma_engine_t dma) { if (info->started) return 0; + // This will only successed if there are no parallel access to DMA engine err = dma_nwl_allocate_engine_buffers(ctx, info); if (err) { @@ -77,6 +78,7 @@ int dma_nwl_start_engine(nwl_dma_t *ctx, pcilib_dma_engine_t dma) { info->preserve = 1; // Acknowledge asserted engine interrupts + nwl_read_register(val, ctx, info->base_addr, REG_DMA_ENG_CTRL_STATUS); if (val & DMA_ENG_INT_ACTIVE_MASK) { val |= DMA_ENG_ALLINT_MASK; nwl_write_register(val, ctx, base, REG_DMA_ENG_CTRL_STATUS); |