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authorSuren A. Chilingaryan <csa@dside.dyndns.org>2011-07-17 03:37:29 +0200
committerSuren A. Chilingaryan <csa@dside.dyndns.org>2011-07-17 03:37:29 +0200
commit112030c40f88dde281073e00e4c24cc48daa99d2 (patch)
treef6486582ee46a2b3b48bba5bc9d96c8432d0b7dc /dma/nwl_irq.c
parent7ac0539951ff0eba200e64b850b5181a82915c86 (diff)
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Implement DMA access synchronization for NWL implementation
Diffstat (limited to 'dma/nwl_irq.c')
-rw-r--r--dma/nwl_irq.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/dma/nwl_irq.c b/dma/nwl_irq.c
index 3a9d9a2..86f1845 100644
--- a/dma/nwl_irq.c
+++ b/dma/nwl_irq.c
@@ -37,7 +37,7 @@ int dma_nwl_enable_irq(pcilib_dma_context_t *vctx, pcilib_irq_type_t type, pcili
uint32_t val;
nwl_dma_t *ctx = (nwl_dma_t*)vctx;
- if (flags&PCILIB_DMA_FLAG_PERMANENT) ctx->irq_preserve |= type;
+ if (flags&PCILIB_DMA_FLAG_PERSISTENT) ctx->irq_preserve |= type;
if ((ctx->irq_enabled&type) == type) return 0;
@@ -72,7 +72,7 @@ int dma_nwl_disable_irq(pcilib_dma_context_t *vctx, pcilib_dma_flags_t flags) {
val &= ~(DMA_INT_ENABLE|DMA_USER_INT_ENABLE);
nwl_write_register(val, ctx, ctx->base_addr, REG_DMA_CTRL_STATUS);
- if (flags&PCILIB_DMA_FLAG_PERMANENT) ctx->irq_preserve = 0;
+ if (flags&PCILIB_DMA_FLAG_PERSISTENT) ctx->irq_preserve = 0;
return 0;
}