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author | Suren A. Chilingaryan <csa@dside.dyndns.org> | 2011-10-26 07:12:31 +0200 |
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committer | Suren A. Chilingaryan <csa@dside.dyndns.org> | 2011-10-26 07:12:31 +0200 |
commit | 32c2f2c589c1a3ccf5dd9117538aafc6f3e0194e (patch) | |
tree | 7cf6cf29b564505655db004d5df11fa28c687278 /dma/nwl_irq.c | |
parent | 39125f647c27a19abf85b25c753fc97832708d38 (diff) | |
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Improvements of DMA engine
Diffstat (limited to 'dma/nwl_irq.c')
-rw-r--r-- | dma/nwl_irq.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/dma/nwl_irq.c b/dma/nwl_irq.c index ae4aacc..ee5f520 100644 --- a/dma/nwl_irq.c +++ b/dma/nwl_irq.c @@ -81,7 +81,7 @@ int dma_nwl_disable_irq(pcilib_dma_context_t *vctx, pcilib_dma_flags_t flags) { int dma_nwl_enable_engine_irq(nwl_dma_t *ctx, pcilib_dma_engine_t dma) { uint32_t val; - dma_nwl_enable_irq(ctx, PCILIB_DMA_IRQ, 0); + dma_nwl_enable_irq((pcilib_dma_context_t*)ctx, PCILIB_DMA_IRQ, 0); nwl_read_register(val, ctx, ctx->engines[dma].base_addr, REG_DMA_ENG_CTRL_STATUS); val |= (DMA_ENG_INT_ENABLE); |