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author | Suren A. Chilingaryan <csa@dside.dyndns.org> | 2011-07-18 16:42:51 +0200 |
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committer | Suren A. Chilingaryan <csa@dside.dyndns.org> | 2011-07-18 16:42:51 +0200 |
commit | 9e424252a35879f121e7ea4531a9ab3dda56d595 (patch) | |
tree | 2cf3dfeceb67eee989a6cc4b20f639baf68748f8 /dma/nwl_irq.c | |
parent | e9904116a5b39e47744fb39cc5aad574c8bee03f (diff) | |
download | ipecamera-9e424252a35879f121e7ea4531a9ab3dda56d595.tar.gz ipecamera-9e424252a35879f121e7ea4531a9ab3dda56d595.tar.bz2 ipecamera-9e424252a35879f121e7ea4531a9ab3dda56d595.tar.xz ipecamera-9e424252a35879f121e7ea4531a9ab3dda56d595.zip |
IRQ acknowledgement support in the engine API
Diffstat (limited to 'dma/nwl_irq.c')
-rw-r--r-- | dma/nwl_irq.c | 16 |
1 files changed, 15 insertions, 1 deletions
diff --git a/dma/nwl_irq.c b/dma/nwl_irq.c index 86f1845..ae4aacc 100644 --- a/dma/nwl_irq.c +++ b/dma/nwl_irq.c @@ -100,6 +100,20 @@ int dma_nwl_disable_engine_irq(nwl_dma_t *ctx, pcilib_dma_engine_t dma) { return 0; } +int dma_nwl_acknowledge_irq(pcilib_dma_context_t *vctx, pcilib_irq_type_t irq_type, pcilib_irq_source_t irq_source) { + uint32_t val; + + nwl_dma_t *ctx = (nwl_dma_t*)vctx; + pcilib_nwl_engine_description_t *info = ctx->engines + irq_source; + if (irq_type != PCILIB_DMA_IRQ) return PCILIB_ERROR_NOTSUPPORTED; + if (irq_source >= ctx->n_engines) return PCILIB_ERROR_NOTAVAILABLE; -// ACK + nwl_read_register(val, ctx, info->base_addr, REG_DMA_ENG_CTRL_STATUS); + if (val & DMA_ENG_INT_ACTIVE_MASK) { + val |= DMA_ENG_ALLINT_MASK; + nwl_write_register(val, ctx, info->base_addr, REG_DMA_ENG_CTRL_STATUS); + } + + return 0; +} |