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author | Suren A. Chilingaryan <csa@suren.me> | 2014-12-19 00:14:21 +0100 |
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committer | Suren A. Chilingaryan <csa@suren.me> | 2014-12-19 00:14:21 +0100 |
commit | a640c40c6bcf4bad0b78e0ea6ea04f2a5f3f877f (patch) | |
tree | 7a6b899c130510e3cca87c23b26a5a1ffc033f20 /dma/nwl_private.h | |
parent | 0e16eeef08ed9b27f0fbc7f02a562a81e10c4119 (diff) | |
download | ipecamera-a640c40c6bcf4bad0b78e0ea6ea04f2a5f3f877f.tar.gz ipecamera-a640c40c6bcf4bad0b78e0ea6ea04f2a5f3f877f.tar.bz2 ipecamera-a640c40c6bcf4bad0b78e0ea6ea04f2a5f3f877f.tar.xz ipecamera-a640c40c6bcf4bad0b78e0ea6ea04f2a5f3f877f.zip |
Initial implementation of IPEDMA, dummy driver for KAPTURE, start of API changes
Diffstat (limited to 'dma/nwl_private.h')
-rw-r--r-- | dma/nwl_private.h | 67 |
1 files changed, 67 insertions, 0 deletions
diff --git a/dma/nwl_private.h b/dma/nwl_private.h new file mode 100644 index 0000000..756e6ca --- /dev/null +++ b/dma/nwl_private.h @@ -0,0 +1,67 @@ +#ifndef _PCILIB_DMA_NWL_PRIVATE_H +#define _PCILIB_DMA_NWL_PRIVATE_H + +typedef struct nwl_dma_s nwl_dma_t; +typedef struct pcilib_nwl_engine_description_s pcilib_nwl_engine_description_t; + +#define NWL_DMA_IRQ_SOURCE 0 + +#define NWL_XAUI_ENGINE 0 +#define NWL_XRAWDATA_ENGINE 1 +#define NWL_MAX_PACKET_SIZE 4096 //16384 +//#define NWL_GENERATE_DMA_IRQ + +#define PCILIB_NWL_ALIGNMENT 64 // in bytes +#define PCILIB_NWL_DMA_DESCRIPTOR_SIZE 64 // in bytes +#define PCILIB_NWL_DMA_PAGES 256 // 1024 + +//#define DEBUG_HARDWARE +//#define DEBUG_NWL + +#include "nwl.h" +#include "nwl_irq.h" +#include "nwl_register.h" +#include "nwl_engine.h" +#include "nwl_loopback.h" + +#define nwl_read_register(var, ctx, base, reg) pcilib_datacpy(&var, base + reg, 4, 1, ctx->dma_bank->raw_endianess) +#define nwl_write_register(var, ctx, base, reg) pcilib_datacpy(base + reg, &var, 4, 1, ctx->dma_bank->raw_endianess) + +struct pcilib_nwl_engine_description_s { + pcilib_dma_engine_description_t desc; + char *base_addr; + + size_t ring_size, page_size; + size_t head, tail; + pcilib_kmem_handle_t *ring; + pcilib_kmem_handle_t *pages; + + int started; /**< indicates that DMA buffers are initialized and reading is allowed */ + int writting; /**< indicates that we are in middle of writting packet */ + int reused; /**< indicates that DMA was found intialized, buffers were reused, and no additional initialization is needed */ + int preserve; /**< indicates that DMA should not be stopped during clean-up */ +}; + + +struct nwl_dma_s { + struct pcilib_dma_context_s dmactx; + + pcilib_t *pcilib; + + pcilib_dma_modification_t type; + + pcilib_register_bank_description_t *dma_bank; + char *base_addr; + + pcilib_irq_type_t irq_enabled; /**< indicates that IRQs are enabled */ + pcilib_irq_type_t irq_preserve; /**< indicates that IRQs should not be disabled during clean-up */ + int started; /**< indicates that DMA subsystem is initialized and DMA engine can start */ + int irq_started; /**< indicates that IRQ subsystem is initialized (detecting which types should be preserverd) */ + int loopback_started; /**< indicates that benchmarking subsystem is initialized */ + + pcilib_dma_engine_t n_engines; + pcilib_nwl_engine_description_t engines[PCILIB_MAX_DMA_ENGINES + 1]; +}; + + +#endif /* _PCILIB_DMA_NWL_PRIVATE_H */ |