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| author | root <root@iss-tomyspiel-l> | 2011-06-16 01:26:14 +0200 |
|---|---|---|
| committer | root <root@iss-tomyspiel-l> | 2011-06-16 01:26:14 +0200 |
| commit | c95df4d43738e1597c348bc7f98ff2902574d720 (patch) | |
| tree | 1ecf978533c5cf81cc2052db696d2a2422de323e /ipecamera/model.c | |
| parent | a6965d707c82317f31bb7ed8eabea05b7adb6775 (diff) | |
| download | ipecamera-c95df4d43738e1597c348bc7f98ff2902574d720.tar.gz ipecamera-c95df4d43738e1597c348bc7f98ff2902574d720.tar.bz2 ipecamera-c95df4d43738e1597c348bc7f98ff2902574d720.tar.xz ipecamera-c95df4d43738e1597c348bc7f98ff2902574d720.zip | |
Move to new FPGA design
Diffstat (limited to 'ipecamera/model.c')
| -rw-r--r-- | ipecamera/model.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/ipecamera/model.c b/ipecamera/model.c index c258a32..23715e3 100644 --- a/ipecamera/model.c +++ b/ipecamera/model.c @@ -31,8 +31,8 @@ int ipecamera_read(pcilib_t *ctx, pcilib_register_bank_description_t *bank, pcil assert(addr < 128); - wr = pcilib_resolve_register_address(ctx, bank->write_addr); - rd = pcilib_resolve_register_address(ctx, bank->read_addr); + wr = pcilib_resolve_register_address(ctx, bank->bar, bank->write_addr); + rd = pcilib_resolve_register_address(ctx, bank->bar, bank->read_addr); if ((!rd)||(!wr)) { pcilib_error("Error resolving addresses of read & write registers"); return PCILIB_ERROR_INVALID_ADDRESS; @@ -121,8 +121,8 @@ int ipecamera_write(pcilib_t *ctx, pcilib_register_bank_description_t *bank, pci assert(addr < 128); assert(value < 256); - wr = pcilib_resolve_register_address(ctx, bank->write_addr); - rd = pcilib_resolve_register_address(ctx, bank->read_addr); + wr = pcilib_resolve_register_address(ctx, bank->bar, bank->write_addr); + rd = pcilib_resolve_register_address(ctx, bank->bar, bank->read_addr); if ((!rd)||(!wr)) { pcilib_error("Error resolving addresses of read & write registers"); return PCILIB_ERROR_INVALID_ADDRESS; |