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* Support FIFO reading/writting, code restructurization, few fixesSuren A. Chilingaryan2011-07-061-54/+179
* North West Logick DMA implementationroot2011-07-041-5/+37
* DMA engine initialization and basic intrastructure for DMA read/writeroot2011-06-181-25/+47
* Enumerate DMA enginesroot2011-06-171-1/+2
* A bit of DMA infrastructureroot2011-06-161-3/+49
* Move to new FPGA designroot2011-06-161-9/+31
* Do not crash if model is not definedSuren A. Chilingaryan2011-05-181-6/+8
* Introduce pcilib_context_t type instead pointer to voidSuren A. Chilingaryan2011-04-141-1/+1
* Support quiete mode to suppress warningsSuren A. Chilingaryan2011-04-131-2/+14
* clean upSuren A. Chilingaryan2011-04-121-1/+1
* Prototype of IPECamera image protocolSuren A. Chilingaryan2011-04-121-6/+8
* Infrastructure for event APISuren A. Chilingaryan2011-04-121-8/+84
* Support memset operationSuren A. Chilingaryan2011-04-061-4/+22
* Fix exiting on warningsSuren A. Chilingaryan2011-03-251-1/+1
* Set warning handlerMatthias Vogelgesang2011-03-141-1/+1
* Suppress warningSuren A. Chilingaryan2011-03-111-1/+1
* Provide single header for librarySuren A. Chilingaryan2011-03-091-1/+1
* Support for FPGA registersSuren A. Chilingaryan2011-03-091-8/+9
* Support writting and reading of register rangesSuren A. Chilingaryan2011-03-091-3/+69
* Fixes write verification failure if byte-swapping is in forceSuren A. Chilingaryan2011-03-091-1/+1
* Better handling of register banksSuren A. Chilingaryan2011-03-091-23/+83
* Initial support of IPECamera protocolSuren A. Chilingaryan2011-03-081-80/+118
* Write LSB first and fix memory allocation bugMatthias Vogelgesang2011-03-011-2/+5
* Initial support for registers, infrastructure onlySuren A. Chilingaryan2011-02-181-0/+579