| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | IRQ support in NWL DMA engine | Suren A. Chilingaryan | 2011-07-11 | 1 | -0/+1 |
| * | Support dynamic registers, support register offsets and multiregisters (bitma... | Suren A. Chilingaryan | 2011-07-09 | 1 | -1/+4 |
| * | Support FIFO reading/writting, code restructurization, few fixes | Suren A. Chilingaryan | 2011-07-06 | 1 | -0/+3 |
| * | North West Logick DMA implementation | root | 2011-07-04 | 1 | -4/+39 |
| * | Enumerate DMA engines | root | 2011-06-17 | 1 | -4/+3 |
| * | A bit of DMA infrastructure | root | 2011-06-16 | 1 | -4/+9 |
| * | Prototype of IPECamera image protocol | Suren A. Chilingaryan | 2011-04-12 | 1 | -3/+3 |
| * | Infrastructure for event API | Suren A. Chilingaryan | 2011-04-12 | 1 | -4/+4 |
| * | Move model decription to public header | Suren A. Chilingaryan | 2011-03-11 | 1 | -1/+0 |
| * | Provide single header for library | Suren A. Chilingaryan | 2011-03-09 | 1 | -124/+2 |
| * | Support for FPGA registers | Suren A. Chilingaryan | 2011-03-09 | 1 | -1/+10 |
| * | Support writting and reading of register ranges | Suren A. Chilingaryan | 2011-03-09 | 1 | -1/+2 |
| * | Better handling of register banks | Suren A. Chilingaryan | 2011-03-09 | 1 | -2/+13 |
| * | Initial support of IPECamera protocol | Suren A. Chilingaryan | 2011-03-08 | 1 | -28/+84 |
| * | Initial support for registers, infrastructure only | Suren A. Chilingaryan | 2011-02-18 | 1 | -0/+81 |
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index : csa/daq/alps/ipecamera.git | |
| Unnamed repository; edit this file 'description' to name the repository. | Suren A. Chilingaryan |
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