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author | Suren A. Chilingaryan <csa@suren.me> | 2023-05-25 22:41:04 +0200 |
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committer | Suren A. Chilingaryan <csa@suren.me> | 2023-05-25 22:41:04 +0200 |
commit | 6f4af841f6fdd099b97d071ae64c8be60f809456 (patch) | |
tree | d4f9a18b38e1ce3cfc0a5336215d5ce3afe830d2 /registers.h | |
download | pcidev-6f4af841f6fdd099b97d071ae64c8be60f809456.tar.gz pcidev-6f4af841f6fdd099b97d071ae64c8be60f809456.tar.bz2 pcidev-6f4af841f6fdd099b97d071ae64c8be60f809456.tar.xz pcidev-6f4af841f6fdd099b97d071ae64c8be60f809456.zip |
A sample event engine for pcitool (not requiring any PCIe hardware). Initial (barely tested and intended only as an example) release
Diffstat (limited to 'registers.h')
-rw-r--r-- | registers.h | 36 |
1 files changed, 36 insertions, 0 deletions
diff --git a/registers.h b/registers.h new file mode 100644 index 0000000..d98a3fe --- /dev/null +++ b/registers.h @@ -0,0 +1,36 @@ +#ifndef _PCIDEV_CMOSIS_H +#define _PCIDEV_CMOSIS_H + +#include <pcilib/bank.h> + +#include "version.h" + +enum ipecamera_protocol_s { + PCIDEV_PROTOCOL_DEFAULT = PCILIB_REGISTER_PROTOCOL0, +}; + +pcilib_register_bank_context_t* pcidev_regfile_open(pcilib_t *ctx, pcilib_register_bank_t bank, const char* model, const void *args); +void pcidev_regfile_close(pcilib_t *ctx, pcilib_register_bank_context_t *reg_bank_ctx); +int pcidev_register_read(pcilib_t *ctx, pcilib_register_bank_context_t *bank, pcilib_register_addr_t addr, pcilib_register_value_t *value); +int pcidev_register_write(pcilib_t *ctx, pcilib_register_bank_context_t *bank, pcilib_register_addr_t addr, pcilib_register_value_t value); + + +# ifdef _PCIDEV_MODEL_C +static const pcilib_register_protocol_api_description_t pcidev_protocol_api = + { PCIDEV_VERSION, pcidev_regfile_open, pcidev_regfile_close, NULL, pcidev_register_read, pcidev_register_write }; + +static const pcilib_register_protocol_description_t pcidev_protocols[] = { + {PCIDEV_PROTOCOL_DEFAULT, &pcidev_protocol_api, NULL, NULL, "pcidev", "Dummy register protocol sample"}, + { 0 } +}; + +static const pcilib_register_bank_description_t pcidev_banks[] = { + { 0, 0, 0, 0, 0, 0, 0, 0, 0, NULL, NULL, NULL } +}; + +static const pcilib_register_range_t pcidev_ranges[] = { + {0, 0, 0, 0} +}; +# endif /* _PCIDEV_MODEL_C */ + +#endif /* _PCIDEV_CMOSIS_H */ |