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| author | Suren A. Chilingaryan <csa@dside.dyndns.org> | 2013-07-26 18:30:47 +0200 |
|---|---|---|
| committer | Suren A. Chilingaryan <csa@dside.dyndns.org> | 2013-07-26 18:30:47 +0200 |
| commit | 7d1a222eaa8cb0965446ad0e745271c070521e78 (patch) | |
| tree | 7cb0491f1e5e395c318856e0431bbdb41608da95 /apps | |
| parent | f5b4c23cc79affe851016c7ef7970b3e3489fad3 (diff) | |
| download | pcitool-7d1a222eaa8cb0965446ad0e745271c070521e78.tar.gz pcitool-7d1a222eaa8cb0965446ad0e745271c070521e78.tar.bz2 pcitool-7d1a222eaa8cb0965446ad0e745271c070521e78.tar.xz pcitool-7d1a222eaa8cb0965446ad0e745271c070521e78.zip | |
Support offseted BARs in the xilinx2 test app
Diffstat (limited to 'apps')
| -rw-r--r-- | apps/xilinx2.c | 10 |
1 files changed, 7 insertions, 3 deletions
diff --git a/apps/xilinx2.c b/apps/xilinx2.c index 30e0f94..757c388 100644 --- a/apps/xilinx2.c +++ b/apps/xilinx2.c @@ -35,8 +35,8 @@ much extra time */ //#define WR(addr, value) { val = value; pcilib_write(pci, BAR, addr, sizeof(val), &val); } //#define RD(addr, value) { pcilib_read(pci, BAR, addr, sizeof(val), &val); value = val; } -#define WR(addr, value) { *(uint32_t*)(bar + addr) = value; } -#define RD(addr, value) { value = *(uint32_t*)(bar + addr); } +#define WR(addr, value) { *(uint32_t*)(bar + addr + offset) = value; } +#define RD(addr, value) { value = *(uint32_t*)(bar + addr + offset); } static void fail(const char *msg, ...) { va_list va; @@ -77,6 +77,9 @@ int main() { void* volatile bar; uintptr_t bus_addr[BUFFERS]; + pcilib_bar_t bar_tmp = BAR; + uintptr_t offset = 0; + pcilib_kmem_flags_t clean_flags = PCILIB_KMEM_FLAG_HARDWARE|PCILIB_KMEM_FLAG_PERSISTENT|PCILIB_KMEM_FLAG_EXCLUSIVE; #ifdef ADD_DELAYS @@ -104,6 +107,8 @@ int main() { fail("map bar"); } + pcilib_detect_address(pci, &bar_tmp, &offset, 1); + // Reset WR(0x00, 1) usleep(1000); @@ -190,7 +195,6 @@ int main() { } gettimeofday(&end, NULL); - #ifdef CHECK_RESULT pcilib_kmem_sync_block(pci, kbuf, PCILIB_KMEM_SYNC_FROMDEVICE, 0); |