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authorSuren A. Chilingaryan <csa@dside.dyndns.org>2011-07-14 01:44:10 +0200
committerSuren A. Chilingaryan <csa@dside.dyndns.org>2011-07-14 01:44:10 +0200
commitb492b1aac3d12683ccbc973b08b023ba0466cbec (patch)
tree09f6d3d0cc3725b62a5c9210220e14316b737622 /dma/nwl_register.h
parent9f17f71885344d93b16fdc17458aa28ba350a480 (diff)
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Support modifications of DMA engine and allow DMA customizations by Event engine
Diffstat (limited to 'dma/nwl_register.h')
-rw-r--r--dma/nwl_register.h8
1 files changed, 8 insertions, 0 deletions
diff --git a/dma/nwl_register.h b/dma/nwl_register.h
index bffc1bf..df479e9 100644
--- a/dma/nwl_register.h
+++ b/dma/nwl_register.h
@@ -86,6 +86,14 @@ static pcilib_register_description_t nwl_xrawdata_registers[] = {
{0x9108, 0, 1, 0, 0x00000003, PCILIB_REGISTER_RW, PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "xrawdata_enable_checker", ""},
{0x9108, 1, 1, 0, 0x00000003, PCILIB_REGISTER_RW, PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "xrawdata_enable_loopback", ""},
{0x910C, 0, 1, 0, 0x00000000, PCILIB_REGISTER_R , PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMA, "xrawdata_data_mistmatch", ""},
+#ifdef DEBUG_HARDWARE
+ {0x9050, 0, 32, 0, 0x00000000, PCILIB_REGISTER_R , PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMA, "reg9050", ""},
+ {0x9080, 0, 32, 0, 0x00000000, PCILIB_REGISTER_R , PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMA, "reg9080", ""},
+ {0x9090, 0, 32, 0, 0x00000000, PCILIB_REGISTER_R , PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMA, "reg9090", ""},
+ {0x9100, 0, 32, 0, 0x00000000, PCILIB_REGISTER_R , PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMA, "reg9100", ""},
+ {0x9110, 0, 32, 0, 0x00000000, PCILIB_REGISTER_R , PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMA, "reg9110", ""},
+ {0x9160, 0, 32, 0, 0x00000000, PCILIB_REGISTER_R , PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMA, "reg9160", ""},
+#endif /* DEBUG_HARDWARE */
{0, 0, 0, 0, 0x00000000, 0, 0, 0, NULL, NULL}
};