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author | Suren A. Chilingaryan <csa@suren.me> | 2015-10-22 17:08:11 +0200 |
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committer | Suren A. Chilingaryan <csa@suren.me> | 2015-10-22 17:08:11 +0200 |
commit | ad838ab9f70ff9712c256f072e260e03a8d7a7da (patch) | |
tree | 4f82d7a5274ebcfe6451e2c6c0b8ad36d14f86e6 /protocols | |
parent | a0fe5cdea15bca52d3b101a88c11cb160ef08b2f (diff) | |
download | pcitool-ad838ab9f70ff9712c256f072e260e03a8d7a7da.tar.gz pcitool-ad838ab9f70ff9712c256f072e260e03a8d7a7da.tar.bz2 pcitool-ad838ab9f70ff9712c256f072e260e03a8d7a7da.tar.xz pcitool-ad838ab9f70ff9712c256f072e260e03a8d7a7da.zip |
Fix access to the property-based registers
Diffstat (limited to 'protocols')
-rw-r--r-- | protocols/property.c | 36 |
1 files changed, 34 insertions, 2 deletions
diff --git a/protocols/property.c b/protocols/property.c index 978f22e..e8fec6e 100644 --- a/protocols/property.c +++ b/protocols/property.c @@ -17,8 +17,23 @@ int pcilib_property_registers_read(pcilib_t *ctx, pcilib_register_bank_context_t pcilib_view_t view = addr / access; pcilib_value_t val = {0}; - if ((view == PCILIB_VIEW_INVALID)||(view >= ctx->num_views)||(addr % access)) + if (addr % access) { + pcilib_error("Can't perform unaligned access to property register (the address is 0x%lx and alligment requirement is %u)", addr, access); return PCILIB_ERROR_INVALID_ARGUMENT; + } + + if ((view == PCILIB_VIEW_INVALID)||(view >= ctx->num_views)) + return PCILIB_ERROR_INVALID_ARGUMENT; + + if ((ctx->views[view]->flags&PCILIB_VIEW_FLAG_REGISTER) == 0) { + pcilib_error("Accessing invalid register %u (associated view %u does not provide register functionality)", addr, view); + return PCILIB_ERROR_INVALID_REQUEST; + } + + if ((ctx->views[view]->mode&PCILIB_ACCESS_R) == 0) { + pcilib_error("Read access is not allowed to register %u (view %u)", addr, view); + return PCILIB_ERROR_NOTPERMITED; + } err = pcilib_get_property(ctx, ctx->views[view]->name, &val); if (err) return err; @@ -38,9 +53,26 @@ int pcilib_property_registers_write(pcilib_t *ctx, pcilib_register_bank_context_ pcilib_view_t view = addr / access; pcilib_value_t val = {0}; - if ((view == PCILIB_VIEW_INVALID)||(view >= ctx->num_views)||(addr % access)) + if (addr % access) { + pcilib_error("Can't perform unaligned access to property register (the address is 0x%lx and alligment requirement is %u)", addr, access); + return PCILIB_ERROR_INVALID_ARGUMENT; + } + + if ((view == PCILIB_VIEW_INVALID)||(view >= ctx->num_views)) return PCILIB_ERROR_INVALID_ARGUMENT; + + if ((ctx->views[view]->flags&PCILIB_VIEW_FLAG_REGISTER) == 0) { + pcilib_error("Accessing invalid register %u (associated view %u does not provide register functionality)", addr, view); + return PCILIB_ERROR_INVALID_REQUEST; + } + + if ((ctx->views[view]->mode&PCILIB_ACCESS_W) == 0) { + pcilib_error("Write access is not allowed to register %u (view %u)", addr, view); + return PCILIB_ERROR_NOTPERMITED; + } + + err = pcilib_set_value_from_register_value(ctx, &val, regval); if (err) return err; |