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author | Andreas Kopmann <andreas.kopmann@kit.edu> | 2012-07-31 23:57:04 +0200 |
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committer | Andreas Kopmann <andreas.kopmann@kit.edu> | 2012-07-31 23:57:04 +0200 |
commit | dc1752ece277963f98fb96800a07c1dd8208612e (patch) | |
tree | d7cfaa87402451ad0ce60d7bfbd4c75f2dc71376 /images/regs | |
download | ufo-camera-manual-dc1752ece277963f98fb96800a07c1dd8208612e.tar.gz ufo-camera-manual-dc1752ece277963f98fb96800a07c1dd8208612e.tar.bz2 ufo-camera-manual-dc1752ece277963f98fb96800a07c1dd8208612e.tar.xz ufo-camera-manual-dc1752ece277963f98fb96800a07c1dd8208612e.zip |
Initial version of the UFO camera users manual
Diffstat (limited to 'images/regs')
-rw-r--r-- | images/regs | 116 |
1 files changed, 116 insertions, 0 deletions
diff --git a/images/regs b/images/regs new file mode 100644 index 0000000..f2ddcd9 --- /dev/null +++ b/images/regs @@ -0,0 +1,116 @@ + cmosis_number_lines = 1088 [1088] + cmosis_start1 = 0 [0] + cmosis_start2 = 0 [0] + cmosis_start3 = 0 [0] + cmosis_start4 = 0 [0] + cmosis_start5 = 0 [0] + cmosis_start6 = 0 [0] + cmosis_start7 = 0 [0] + cmosis_start8 = 0 [0] + cmosis_number_lines1 = 0 [0] + cmosis_number_lines2 = 0 [0] + cmosis_number_lines3 = 0 [0] + cmosis_number_lines4 = 0 [0] + cmosis_number_lines5 = 0 [0] + cmosis_number_lines6 = 0 [0] + cmosis_number_lines7 = 0 [0] + cmosis_number_lines8 = 0 [0] + cmosis_sub_s = 0 [0] + cmosis_sub_a = 0 [0] + cmosis_color = 1 [1] + cmosis_image_flipping = 0 [0] + cmosis_exp_flags = 0 [0] + cmosis_exp_time = 37 [1088] + cmosis_exp_step = 0 [1088] + cmosis_exp_kp1 = 2189 [1] + cmosis_exp_kp2 = 3365 [1] + cmosis_nr_slopes = 2 [1] + cmosis_exp_seq = 1 [1] + cmosis_exp_time2 = 1088 [1088] + cmosis_exp_step2 = 0 [1088] + cmosis_nr_slopes2 = 1 [1] + cmosis_exp_seq2 = 1 [1] + cmosis_number_frames = 1 [1] + cmosis_output_mode = 0 [0] + cmosis_training_pattern = 85 [85] + cmosis_channel_en = 262143 [262143] + cmosis_special_82 = 7 [7] + cmosis_vlow2 = 54 [96] + cmosis_vlow3 = 106 [96] + cmosis_offset = 16323 [16260] + cmosis_pga = 3 [0] + cmosis_adc_gain = 44 [32] + cmosis_bit_mode = 0 [1] + cmosis_adc_resolution = 0 [0] + cmosis_special_115 = 1 [1] + spi_conf_input = 0x7300 [0x0] + spi_conf_output = 0xb7301 [0x0] + spi_clk_speed = 0x4 [0x0] + firmware_info = 0x5 [0x0] + control = 0x3e1 [0x0] + status = 0x8449ffff [0x0] + status2 = 0xf001001 [0x0] + status3 = 0x3ffff111 [0x0] + fr_status = 0x0 [0x0] + start_address = 0xd8e8c0 [0x0] + end_address = 0xe179c4 [0x0] + rd_address = 0xe179c8 [0x0] + fr_param1 = 0x0 [0x0] + fr_param2 = 0x0 [0x0] + skiped_lines = 0x0 [0x0] + rawdata_pkt_addr = 0x1000 [0x0] + temperature_info = 0x14ab0483 [0x0] + num_lines = 0x440 [0x0] + start_line = 0x0 [0x0] + exp_time = 0x25 [0x0] + motor = 0x2c00000 [0x0] + write_status = 0x0 [0x0] + num_triggers = 0x0 [0x0] + trigger_period = 0x280 [0x280] + temperature_sample_period = 0x7735940 [0x0] + ddr_max_frames = 0x70 [0x64] + ddr_num_frames = 0x0 [0x0] + dma_control_and_status = 0x2008 [0x0] + dma_design_version = 0x0 [0x0] + dma_transmit_utilization = 0x0 [0x0] + dma_receive_utilization = 0x0 [0x0] + dma_mwr = 0x0 [0x0] + dma_cpld = 0x0 [0x0] + dma_init_fc_cpld = 0x0 [0x0] + dma_init_fc_cplh = 0x0 [0x0] + dma_init_fc_npd = 0x0 [0x0] + dma_init_fc_nph = 0x0 [0x0] + dma_init_fc_pd = 0x0 [0x0] + dma_init_fc_ph = 0x0 [0x0] + dma0w_engine_capabilities = 0x14000011 [0x0] + dma0w_engine_control = 0x0 [0x0] + dma0w_next_descriptor = 0x0 [0x0] + dma0w_sw_descriptor = 0x0 [0x0] + dma0w_last_descriptor = 0x0 [0x0] + dma0w_active_time = 0x7 [0x0] + dma0w_wait_time = 0x7 [0x0] + dma0w_counter = 0x3 [0x0] + dma1w_engine_capabilities = 0x14000111 [0x0] + dma1w_engine_control = 0x1d00 [0x0] + dma1w_next_descriptor = 0x6a640000 [0x0] + dma1w_sw_descriptor = 0x6a640000 [0x0] + dma1w_last_descriptor = 0x0 [0x0] + dma1w_active_time = 0x3b9aca03 [0x0] + dma1w_wait_time = 0x3b9aca03 [0x0] + dma1w_counter = 0x3 [0x0] + dma0r_engine_capabilities = 0x14000013 [0x0] + dma0r_engine_control = 0x0 [0x0] + dma0r_next_descriptor = 0x0 [0x0] + dma0r_sw_descriptor = 0x0 [0x0] + dma0r_last_descriptor = 0x0 [0x0] + dma0r_active_time = 0x7 [0x0] + dma0r_wait_time = 0x7 [0x0] + dma0r_counter = 0x3 [0x0] + dma1r_engine_capabilities = 0x14000113 [0x0] + dma1r_engine_control = 0x500 [0x0] + dma1r_next_descriptor = 0x6e651200 [0x0] + dma1r_sw_descriptor = 0x6e651140 [0x0] + dma1r_last_descriptor = 0x6e651140 [0x0] + dma1r_active_time = 0x3b9aca03 [0x0] + dma1r_wait_time = 0x7 [0x0] + dma1r_counter = 0x3 [0x0 |